The present invention relates to data processing systems, and more specifically, to a system in which a single processor system is converted into a distributed processor system.
Present-day data terminal devices have been developed using low-cost microprocessors such as the Intel 8080A microprocessor for supplying the processing power required for the terminal system. After installation and operation, it has been found that in many instances the terminal processing system is being all but totally overloaded requiring limiting the operation of the terminal or redesigning the processing system to include a more powerful processor, which in the latter case is quite costly. If the processing system is constructed on a request acknowledge basis, it is relatively easy to make the system memory a two port memory and add a second processor to assume part of the load. Where the system is not based on a true memory request acknowledge system, adding a second processor requires considerable redesign of the system to allow for the interfacing of the two processors without restricting the operation of either of the processors. It is therefore the principal object of this invention to provide a data processing system in which a processor is added to an established data processing system using a minimum amount of circuit hardware. It is another object of this invention to provide a system in which a fast processor is interfaced with a slow processor and in which each processor will have access to the same data. It is a further object of this invention to provide a data processing system in which a slow processor is given priority over a fast processor in accessing a common memory without allowing any data to be lost or modified when a conflict arises between the two processors in accessing the common memory.